1. Field of the Invention
This invention relates to a semiconductor device and its manufacturing method, and more particularly to a semiconductor device in which a circuit board and a semiconductor chip are connected to each other by face-down techniques.
2. Description of the Related Art
The recent progress in semiconductor integrated-circuit technology is making electrical equipment smaller, thinner, and more powerful. With such trends, it is more important to assemble semiconductor chips on a circuit board at a high packing density. Some of noticeable assembling methods to meet such requirements are face-down techniques, beam-lead techniques, and tape-carrier techniques. Further, a flip-chip method is expected to be suitable assembling techniques for making the product smaller and thinner.
FIG. 14 is a sectional view of a conventional semiconductor device assembled by face-down techniques. In the semiconductor device, projected electrodes, called bumps 4, made of metal such as solder or nickel, are formed on pads of a semiconductor chip, the bumps 4 are aligned with the electrode connecting portions of a circuit board 2 and mounted on the latter, and then the semiconductor chip 1 is connected to the circuit board 2 by reflow.
However, since there is generally a difference in coefficient of thermal expansion between the semiconductor chip and the circuit board, a change in temperature permits stress to concentrate on the bumps, which can cause mechanical or electrical breakage, leading to semiconductor device failure. To avoid this, the following methods are now in use at present.
A first method is to use a circuit board whose coefficient of thermal expansion is less different from that of the semiconductor chip. For example, a method has been proposed in which, for a circuit board, a silicon board whose material is the same as that of the chip is used or an aluminum nitride board whose coefficient of thermal expansion is rather less different from that of the chip is used. Under present conditions, however, those circuit boards are generally too expensive for general-purpose products and are therefore limited to special uses.
Under such conditions, use of the most widely used low-cost resin boards, such as glass epoxy, is desired. Since their coefficient of thermal expansion is nearly six times as high as that of silicon, however, breakage due to stress concentrating on the bumps cannot be avoided.
Another method is to cover the entire semiconductor chip with resin so as to impregnate resin in the gap between the semiconductor chip and the circuit board in order to prevent the stress caused by the difference in coefficient of thermal expansion between the chip and the board from concentrating on the bumps. By this method, face-down assembling can be achieved even with the board of aluminum, whose coefficient of thermal expansion is different from that of silicon. This method is already used with resin boards partially made up of glass epoxy, and is rather an effective method as long as it is not applied to very large chips. For very large chips, this method is not sufficient since the absolute value of the distortion due to the difference in coefficient of thermal expansion is large.
Further, there are some restrictions on the properties of the resin. Two of the most important properties are Young's modulus and coefficient of thermal expansion. Specifically, the resin's Young's modulus is required to be somewhat large in order to prevent stress from concentrating on the bumps, whereas it is desirable that the resin's coefficient of thermal expansion should be as close to that of the bumps as possible. This is because when the resin's coefficient of thermal expansion is larger than that of the bumps beyond a certain level, the expansion of the resin itself makes it impossible to ignore the vertical force exerted on the bump junction surface. In this case, bump breakage in a tear-off mode takes place due to the difference in coefficient of thermal expansion between the bumps and the sealing resin, not due to stress concentrating on the bumps because of the difference in coefficient of thermal expansion between the circuit board and the chip. The coefficient of thermal expansion of the bumps made of metal is generally nearly ten times as large as that of the sealing resin, so that failures stemming from such difference cannot be ignored in practical use.
There are two types of bump breakage due to temperature change. One type results from normal temperature changes. For ordinary face-down assembling, temperature cycle test is conducted in a range of -55.degree. C. to +150.degree. C., for example. Failures occurring in this mode result mainly from the fatigue failure of the bumps due to thermal stress. This can be avoided to some extent by the above-described method of covering the entire semiconductor chip with resin so that resin may be impregnated into a gap between the semiconductor chip and the circuit board.
The other type results from temperature change during reflow. Although there may be some difference in reflow temperature depending on solder material, reflow is generally performed at a temperature of nearly 200.degree. C. or higher and then cooling down to room temperature is achieved. At this time, the bumps are stressed due to difference in coefficient of thermal expansion, which leads to initial breakage. Since the resin-sealing process can theoretically be carried out only after reflow connection, it cannot be expected that resin sealing prevents initial breakage from causing failures.
In addition, an attempt has been made to improve the reliability of face-down connection by making bumps themselves larger. Making bumps larger, however, not only makes fine-pitch connection more difficult, but also increases the processing time and the number of processes.
In the future, it is expected that semiconductor chips will have more and more wider areas and finer interconnections. If the area of the semiconductor chip become more wider, difference in coefficient of thermal expansion makes greater the distortion caused in the gap between the semiconductor chip and the circuit board. Because of this, as interconnections becomes more finer, it is more difficult to produce bumps whose volume can withstand stress. For the reasons mentioned above, it is expected that it will increasingly more difficult to suppress failures stemming from the difference in coefficient of thermal expansion between the semiconductor chip and the circuit board, using only resin.
In a conventional solid-state camera, such as a CCD, as shown in FIG. 15, an imaging element chip 1 is attached to a ceramics package 19 by die bonding, bonding wires are used for electrical connection, an inert gas is filled inside the package, and sealing is achieved by placing a cover glass 21 on the top face. The cover glass 21 is bonded to the ceramic package 19 with a glass bonding and sealing resin 22 to maintain hermetic sealing. Resin, however, not only permits some moisture to penetrate but also absorbs some, which surely affects such resin sealing. For this reason, the reliability is generally assured by making greater the bonding portion of the cover glass 21 and the ceramic package 19.
These days, however, as a result of the improved yield and lower cost of CCDs, there has been a demand for lower-cost packages. For video cameras and endoscopes, it is most important to make solid-state imaging elements smaller and lighter. To meet these demands, a method has been proposed which uses a glass board previously used as a cover glass, forms a wiring pattern on its surface, and connects the CCD chip through bumps (as disclosed in Published Unexamined Japanese Patent Applications No. 62-318665 and No. 1-90618. With this method, it is possible to make a solid-state camera smaller and lighter remarkably. Further, a method has been proposed which permits a transparent organic layer to be deposited on photosensitive pixels, allows the layer to be left on given pixels by photolithography, heat-treats the remaining transparent organic layer into a semi-convex lens for gathering light (as disclosed in Published Unexamined Japanese Patent Application No. 59-68967).
When a wiring pattern is formed on the glass board as described above, there arises a problem due to resin present on the pixel area such that the lens effect is reduced. With this method, the lens effect comes from the difference in refractive index between the transparent organic layer of the lens and the inert gas or air, but the same effect cannot be expected from the difference in refractive index between the sealing resin and the transparent organic layer because their refractive indexes are close.
It is important, however, for solid-state camera to be made more sensitive as well as smaller and lighter. Therefore, it is necessary to make the former compatible with the latter two. To achieve the effect of the semi-convex lens, a method has been proposed which leaves a gaseous layer in the gap between the glass board and the CCD chip (as disclosed in Published Unexamined Japanese Patent Application No. 3-156776). With this method, it is possible to make a solid-state camera smaller and lighter at low cost without lowering the sensitivity.
The method of leaving a gaseous layer in the gap between the glass board and the CCD chip, however, has a reliability problem. Specifically, when a solid-state camera is put in a highly humid atmosphere, moisture 24 penetrates the sealing resin 22 into the package, which raises the humidity there. Sudden temperature changes in the atmosphere there and the effects of heat generated by the CCD operation produce a temperature gradient, which permits dew to condense when the temperature of the glass board 21 is lower than that of the internal atmosphere. It is known that dew is liable to condense especially at the peripheral portion of the pixel area 25 and adheres to the surface of the glass board 21.
This takes place because the penetrating path of moisture is short, or the sealing area of the sealing resin is small. Such dew condensation not only has a direct effect on the image, but also may cause electron migration by conduction. Such problems could be solved by increasing the resin sealing area, which would lead to a larger product. Further, dew condensation could also be suppressed by impregnating resin throughout the gap between the glass board and the CCD chip so as not to leave a gaseous layer on the pixel area. This, however, reduces the effect of the semi-convex lens, thus lowering the sensitivity.
Concerning face-down assembly of those CCD chips, there is a heat dissipation problem. The CCD processes signals of relatively high frequencies and generates heat when in operation. As the temperature of the CCD chip rises, dark current increases, resulting in a relative decrease in the sensitivity. As described above, with a solid-state camera using a ceramic package as shown in FIG. 15, the generated heat escapes to the ceramic package, so that the temperature rise of the CCD chip itself can be suppressed to some extent. Since the face-down assembly has few heat-transferring paths, however, the temperature of the CCD chip rises, which causes dark current to increase, resulting in a relative drop in the sensitivity.
Thus, a conventional solid-state camera has the disadvantage that an attempt to realize a small, low-cost resin-sealing package without lowering the sensitivity results in a decrease in the reliability, particularly a decrease in the moisture resistance.
In addition to the package problem, there is a serious reliability problem with bumps themselves, when face-down assembly, such as a flip-chip method, is used. Specifically, conventional bumps used in flip-chip assembly include solder bumps as shown in FIG. 17. A bump 43 is connected via a barrier metal layer 42 to an aluminum electrode pad 5 formed on the surface of a semiconductor chip 1. Formed around the electrode pad 5 is an insulating layer 41, which has an opening in it to expose the electrode pad 5. The barrier metal layer 42 is formed so as to cover the electrode pad 5 via the opening. The barrier metal layer 42 is obtained by forming a chrome or titanium layer by evaporation or sputtering, then further forming on it a copper or nickel layer and a gold layer in sequence by evaporation or sputtering. On this layer, a bump 43 is formed by electroplating or evaporation. For example, solder containing 95% lead and 5% tin is used. Next, if necessary, the portion other than that under the bump 43 of the barrier metal layer 42 is etched away. Finally, the etched portion is heated to melt in an atmosphere of nitrogen in order to shape the bump 43.
In this way, an example of flip-chip assembly on a board of a semiconductor device with bumps thus formed is shown in FIG. 18. Bumps 43 on the semiconductor chip 1 are first positioned on the wiring board 2 provided with connection electrodes at the portions corresponding to the bumps so that each bump may mate with a corresponding connection electrode 8, and then the semiconductor chip 1 is placed on the wiring board 2. At this time, if necessary, flux is applied over the wiring board 2. Next, re-fusing the bumps 43 causes the bumps to connect the semiconductor chip 1 to the wiring board 2.
In this case, the pressure applied by the semiconductor chip placed and its own weight during the re-fusing of the bumps reduce the bump's height and widen its width. As a result, the bumps after connection become lower than during the formation of the bumps: the bump's actual height is nearly 50% of its width. Because the bump's width becomes wider during connection, making the distance between solder bumps introduces the danger of causing a short between adjacent bumps. Therefore, in practice, it is necessary to make the distance between bumps larger than the height of the bumps. This requirement makes it difficult to make the distance between bumps shorter for narrower pitches.
To overcome this problem, as shown in FIG. 19, a bump structure has been proposed in which low melting-point metal such as solder covers the core of high melting-point metal such as copper. In this example, the processes as far as the formation of the barrier metal layer 42 are the same as those shown in FIG. 17. Next, a resist patterning for plating is formed on the barrier metal layer 42 and then a pillar-shaped, high melting-point core layer 44 of copper or nickel is selectively formed by electroplating. Further, a solder layer 45 is formed on the core layer 44 using electroplating. By reflowing the solder layer, a bump is formed. In this case, the bump is constructed so that the solder layer 45 surrounds the core layer 44 in the center.
An example of flip-chip assembly of a thus-formed semiconductor device on a board is shown in FIG. 20. The semiconductor chip 1 with bumps and the wiring board 2 with connection electrode pads 8 are positioned by mating the bumps on the semiconductor chip 1 with the connection electrode pads 8 on the wiring board 2, and then the semiconductor chip 1 is placed on the wiring board 2. Next, the solder layer 45 is re-fused. By cooling the solder layer for hardening, the bumps connects the semiconductor chip 1 to the wiring board 2.
In this case, because the height of the bump is controlled by the core layer 44, the width of the bump after connection cannot become too wide. Therefore, this has the advantage that the distance between bumps can be made a narrower pitch than in the examples shown in FIGS. 17 and 18, because there is no possibility that a short takes place between adjacent bumps.
In this example, however, since the core layer 44 is harder than the solder layer 45, when the bump is distorted by external force after connection, distortion will concentrates on the solder layer 45. FIGS. 21A and 21B are schematic views showing the bump distortion. FIG. 21A shows a case where the solder bump of FIG. 17 is distorted, and FIG. 21B shows a case where the bump of FIG. 19 is distorted. In FIG. 21A, the bump is distorted heavily. When the core layer 44 is used, distortion concentrates on the portion 46 between the core layer 44 in the solder layer 45 and the wiring board 2, which makes the portion more liable to fracture, resulting in a decrease in the reliability.
Thus, to increase the connection density by narrowing the distance between adjacent electrodes, it is necessary to suppress the distortion of bumps during connection to prevent adjacent electrodes from short-circuiting with each other due to the decrease of the bump's height during connection. To achieve this, using a hard material for the core of the bump raises the problem that distortion caused by external force under using conditions after connection concentrates on the soft portions of the bump, leading to a decrease in the reliability of the connection portion.
Thus, in semiconductor devices assembled by conventional face-down techniques, there is a problem: stress takes place due to the difference in coefficient of thermal expansion between the semiconductor substrate and the circuit board, causing faulty connections.
Further, particularly with a conventional solid-state camera, an attempt to realize a lower-cost, smaller resin-sealing package without lowering the sensitivity encounters the problem of introducing a decrease in the reliability, especially the moisture resistance.
Still further, for connection by face-down techniques using bumps, a method has been proposed which has a pillar-shaped core layer of high melting point in the center in order to improve the connection density as described earlier. This method, however, has the problem that external force-caused distortion concentrates on the portion of the solder material surrounding the core, lowering the reliability.